Low temperature growth and reliability of ferroelectric memory cell integrated on Si with conducting barrier stack
Publication Type | Journal Article
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Authors | |
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DOI |
10.1557/JMR.1997.0218
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Abstract |
Polycrystalline LSCO/PNZT/LSCO ferroelectric capacitor heterostructures were grown by pulsed laser deposition using a composite conducting barrier layer of Pt/TiN on poly-Si/Si substrate. The growth of the ferroelectric heterostructure is accomplished at a temperature in the range of 500-600°C. This integration results in a 3-dimensional stacked capacitor-transistor geometry which is important for high density nonvolatile memory (HDNVM) applications. Transmission electron microscopy shows smooth substrate-film and film-film interfaces without any perceptible interdiffusion. The ferroelectric properties and reliability of these integrated capacitors were studied extensively at room temperature and 100°C for different growth temperatures. The capacitors exhibit excellent reliability, both at room temperature and at elevated temperatures, making them very desirable for HDNVM applications.
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Notes |
cited By 6
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Journal |
Journal of Materials Research
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Volume |
12
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Year of Publication |
1997
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Number |
6
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Pagination |
1589-1594
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Publisher |
Materials Research Society
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ISSN Number |
08842914
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Keywords |
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Research Areas | |
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