TY - JOUR
KW - Reliability
KW - Deposition
KW - Pulsed laser deposition
KW - Transmission electron microscopy
KW - Crystal growth
KW - Ferroelectric materials
KW - Ferroelectricity
KW - Heterojunctions
KW - Ferroelectric capacitors
KW - Interfaces (materials)
KW - Non-volatile storage
KW - Capacitors
KW - Semiconducting silicon
KW - Low temperature phenomena
KW - Conducting barrier stacks
KW - High density nonvolatile memory (HDNVM)
KW - Low temperature effects
AU - A.M Dhote
AU - S Madhukar
AU - D Young
AU - T Venkatesan
AU - Ramamoorthy Ramesh
AU - C.M Cotell
AU - J.M Benedetto
AB - Polycrystalline LSCO/PNZT/LSCO ferroelectric capacitor heterostructures were grown by pulsed laser deposition using a composite conducting barrier layer of Pt/TiN on poly-Si/Si substrate. The growth of the ferroelectric heterostructure is accomplished at a temperature in the range of 500-600°C. This integration results in a 3-dimensional stacked capacitor-transistor geometry which is important for high density nonvolatile memory (HDNVM) applications. Transmission electron microscopy shows smooth substrate-film and film-film interfaces without any perceptible interdiffusion. The ferroelectric properties and reliability of these integrated capacitors were studied extensively at room temperature and 100°C for different growth temperatures. The capacitors exhibit excellent reliability, both at room temperature and at elevated temperatures, making them very desirable for HDNVM applications.
BT - Journal of Materials Research
DO - 10.1557/JMR.1997.0218
LA - eng
M1 - 6
N1 - cited By 6
N2 - Polycrystalline LSCO/PNZT/LSCO ferroelectric capacitor heterostructures were grown by pulsed laser deposition using a composite conducting barrier layer of Pt/TiN on poly-Si/Si substrate. The growth of the ferroelectric heterostructure is accomplished at a temperature in the range of 500-600°C. This integration results in a 3-dimensional stacked capacitor-transistor geometry which is important for high density nonvolatile memory (HDNVM) applications. Transmission electron microscopy shows smooth substrate-film and film-film interfaces without any perceptible interdiffusion. The ferroelectric properties and reliability of these integrated capacitors were studied extensively at room temperature and 100°C for different growth temperatures. The capacitors exhibit excellent reliability, both at room temperature and at elevated temperatures, making them very desirable for HDNVM applications.
PB - Materials Research Society
PY - 1997
SP - 1589
EP - 1594
T2 - Journal of Materials Research
TI - Low temperature growth and reliability of ferroelectric memory cell integrated on Si with conducting barrier stack
VL - 12
SN - 08842914
ER -