@article{33880,
  keywords = {Reliability, Deposition, Pulsed laser deposition, Transmission electron microscopy, Crystal growth, Ferroelectric materials, Ferroelectricity, Heterojunctions, Ferroelectric capacitors, Interfaces (materials), Non-volatile storage, Capacitors, Semiconducting silicon, Low temperature phenomena, Conducting barrier stacks, High density nonvolatile memory (HDNVM), Low temperature effects},
  author = {A.M Dhote and S Madhukar and D Young and T Venkatesan and Ramamoorthy Ramesh and C.M Cotell and J.M Benedetto},
  title = {Low temperature growth and reliability of ferroelectric memory cell integrated on Si with conducting barrier stack},
  abstract = {Polycrystalline LSCO/PNZT/LSCO ferroelectric capacitor heterostructures were grown by pulsed laser deposition using a composite conducting barrier layer of Pt/TiN on poly-Si/Si substrate. The growth of the ferroelectric heterostructure is accomplished at a temperature in the range of 500-600°C. This integration results in a 3-dimensional stacked capacitor-transistor geometry which is important for high density nonvolatile memory (HDNVM) applications. Transmission electron microscopy shows smooth substrate-film and film-film interfaces without any perceptible interdiffusion. The ferroelectric properties and reliability of these integrated capacitors were studied extensively at room temperature and 100°C for different growth temperatures. The capacitors exhibit excellent reliability, both at room temperature and at elevated temperatures, making them very desirable for HDNVM applications.},
  year = {1997},
  journal = {Journal of Materials Research},
  volume = {12},
  number = {6},
  pages = {1589-1594},
  publisher = {Materials Research Society},
  issn = {08842914},
  doi = {10.1557/JMR.1997.0218},
  note = {cited By 6},
  language = {eng},
}